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?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 corporate bel fuse inc. 206 van vor st street jersey city, nj 07302 tel 201 - 432 - 0463 fax 201 - 432 - 9542 www.belfuse.com asia bel fuse ltd. 8f / 8 luk hop street san po kong kowloon, hong kong tel 852 - 2328 - 5515 fax 852 - 2352 - 3706 www.belfuse.com europe bel integrated modules 28 turkey court, t urkey mill ashford road maidstone, kent me14 5pp u.k. tel 44 - 1622 - 757395 fax 44 - 1622 - 663252 www.belfuse.com 1 0804 - 5000 - 23 industrial powerline module f or ethernet over coax applications features ? based on qualcomm atheros ar6400/ar1400 chipset ? based on homeplug? av standard optimised for ethernet over coax (eoc) applications with raw data rates up to 200 mb/s ? temperature rated for industrial applications ? mii (host & phy) interface ? supp orts1024/256/64/16/8 - qam, qpsk, bpsk, and robo modulation schemes ? 128 - bit aes link encryption with key management for secure power line communications ? dynamic channel adaptation and channel estimation maximizes throughput in harsh channel conditions ? adva nced turbo code forward error correction ? tos, cos and ip port number packet classifiers ? supports igmp managed multicast sessions ? green standard (rohs) compliant ? gpio second function as general data lines ? horizontal mounting configuration using standar d 1.27mm pin header ? integrates all components necessary to add ethernet over coax functionality to any embedded system at low cost applications ? over - the - top video ? telco / iptv ? ethernet - over - coax (eoc) and multi - dwelling unit (mdu) applications description the bel 0804 - 5000 - 23 single in line package (sip) module is an industrial temperature rated mac/phy/afe powerline communications (plc) transceiver. the module complements the existing range of bel powerline modules based on the qualcomm ather os ar6400/ar1400 and is optimised for communications over coax networks. the bel 0804 - 5000 - 23 module enables the development of hd grade communications bridges to and from the coax network. it also serves as a translator between the digital and analogue worlds. on the digital side host interfaces include ethernet mii host or phy. the data received and transmitted is translated by the ar6400 to and from a complex analogue signal which is modulated on multiple carriers and transmitted over the coax network. in partnership with
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 2 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications module block diagram bel 0804 - 5000 - 23 m a c p h y gp i o leds and con fig mii (mdi) reset 3.3v dc dac adc ar6 4 00 sys clk pll cxo bpf ar 1400 tx rx bpf flash ram plc coupler dc - dc 1v 11.2v
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 3 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications module interface pin i/o table pin number pin name pin number pin name 1 vdd 26 mdc 2 vss 27 reserved (n.c.) 3 vdd 28 reserved (required connection to ground) 4 vss 29 vss 5 vdd 30 mrx _d0 6 tx+ 31 mrx_d1 7 tx - 32 mrx_d2 8 vss 33 mrx_d3 9 rx+ 34 col 10 rx - 35 mrx_clk 11 reset/ 36 vss 12 gpio0 37 mrx_err 13 gpio1 38 mrx_dv 14 gpio2 39 mtx_d0 15 gpio3 40 mtx_d1 16 gpio4 41 mtx_d2 17 gpio5 42 mtx_d3 18 gpio6 43 crs 19 gpio7 44 mtx_clk 20 gpio8 45 mtx_en 21 gpio9 46 vss 22 gpio10 47 phy_rst/ 23 gpio11 48 vss 24 reserved (required 10k pull - up resistor) 49 phy_clk 25 mdio 50 vss
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 4 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications system block diagram the block diagram presents the 0804 - 5000 - 23 powerline module in a typical environment. seven different types of interfaces are shown . these i nterfaces are described in detail below. media independent interface (mii) the mii interface is configured as either an ethernet medium access controller (mac) or a physical medium dependent (pmd or phy) controller. medium independent interface (mii) is an industry standard, multi - vendor interface between the mac and phy sub - layers. it provides a simple connection between ethernet phy controllers and ieee802.3 ethernet macs from a variety of sources. mii consists of separate 4 - bit data paths for transmit and receive data along with carrier sense and collision detection. further details of the mii are available from the ieee 802.3u standard. configuration straps described in section 3 set the mii operation to a mac or phy controller. the mac and phy confi gurations support 10 mbps or 100 mbps in half - duplex or full - duplex modes and flow control for half - duplex and full - duplex connections. the ethernet mac module implements standard ethernet mac functionality. the ethernet mac is connected to an external eth ernet phy function. the mac configuration provides bridging between ethernet and the powerline. the phy configuration emulates ethernet phy functionality and provides homeplug av connectivity to devices designed to communicate over an ethernet network. th e mii (ethernet) interface has separate transmit and receive packet buffering. when operating as a mac the mii transmit fifo is 2 kb and the receive fifo is 8 kb. when operating as a phy controller, the mii transmit fifo is 8 kb and the receive fifo is 2 k b. mii mac the mii mac configuration operates as an ieee 802.3 10/100 - mbps ethernet mac connected to an external 10/100 - mbps ethernet phy. 0804 - 50 00 - 23 powerline module phy device or mac controller co - ax ial coupler mii (mac or phy mode) gpio phy utility mdi power reset co - axial network coupling interface
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 5 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications when the power line module boots it attempts to configure the mii mac interface, it will first scan all external m ii phys starting from phy #0 and will select the first phy that responds with valid register contents. the phys link status register will be read, and if the link is up, auto - negotiation will be performed. if the phys status indicates that auto - negoti ation is not supported, auto - negotiation will not be performed. based upon the results of the phys status registers, or auto - negotiation results, the phy will be configured in an operational mode (i.e. no loopback, no collision test, not in isolate, etc .). the mii mac within the power line module will be configured for the same speed and duplex. external devices do not have direct access to any mii mac registers in the ar 6400. mii phy the mii phy emulation hardware connects to an external 10/100 - mbps e thernet mac. the default phy functionality is configured through standard management data int erface communications ( mdi interface ) and may be overridden by the ar 6400 mac firmware access to the phy emulation registers. the interface supports the standard c ontrol and status register. ? link speed at 10 mbps or 100 mbps ? full - duplex or half - duplex operation ? management data interface base address ? isolate to disconnect the phy from the mii port in mii phy mode, auto - negotiation is not supported. gpio strapping o n the power line module will determine the desired configuration, these straps will be reflected in the default settings in the mii phy emulation registers.
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 6 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications mii signals pin number pin name i/o description mac mode phy mode 30 mrx_d0 i o mii receive d ata. the phy controller drives mrx_d[3:0] and the mac core receives mrx_d[3:0]. mrx_d[3:0] transition s synchronously with respect to mrx_clk. for each mrx_clk period in which mrx_dv is asserted, mrx_d[3:0] is valid. mrx_d0 is the least - significant bit. the phy controller tri - states mrx_d[3:0] in isolate mode. 31 mrx_d1 32 mrx_d2 33 mrx_d3 34 col i o mii collision detected. the phy controller asserts col when it detects a collision on the medium. col remains asserted while the collision conditio n persists. col signal transitions are not synchronous to either the mtx_clk or the mrx_clk. the mac core ignores the col signal when operating in the full - duplex mode. the phy controller tri - states col in isolate mode. 35 mrx_clk i o mii receive clock. m rx_clk is a continuous clock that provides the timing reference for the transfer of the mrx_dv and mrx_d[3:0] signals from the phy controller to the mac core. the phy controller sources mrx_clk. mrx_clk frequency is equal to 25% of the data rate of the rec eived signal on the ethernet cable. the phy controller tri - states mrx_clk in isolate mode. 37 mrx_err i o mii receive error. the phy controller asserts mrx_err high for one or more mrx_clk periods to indicate to the mac core that an error (a coding error or any error that the phy is capable of detecting that is otherwise undetectable by the mac) was detected somewhere in the current frame. mrx_err transitions synchronously with respect to mrx_clk. while mrx_dv is de - asserted, mrx_err has no effect on the m ac core. the phy controller tri - states mrx_err in isolate mode. 38 mrx_dv i o mii receive data valid . the phy controller asserts mrx_dv to indicate to the mac core that it is presenting the recovered and decoded data bits on mrx_d[3:0] and that the data o n mrx_d[3:0] is synchronous to mrx_clk. mrx_dv transitions synchronously with respect to mrx_clk. mrx_dv remains asserted continuously from the first recovered nibble of the frame through the final recovered nibble, and is de - asserted prior to the first mr x_clk that follows the final nibble. the phy controller tri - states mrx_dv in isolate mode. 39 mtx_d0 o i mii transmit data. the mac core drives mtx_d[3:0] and the phy controller receives mtx_d[3:0]. mtx_d[3:0] transitions synchronously with respect to mtx _clk. for each mtx_clk period in which mtx_en is asserted, mtx_d[3:0] is valid. mtx_d0 is the least significant bit. the phy controller ignores mtx_d[3:0] in isolate mode. 40 mtx_d1 41 mtx_d2 42 mtx_d3 43 crs i o mii carrier sense. the phy con troller asserts crs when either transmit or receive medium is non - idle. the phy de - asserts crs when both transmit and receive medium are idle. the phy must ensure that crs remains asserted throughout
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 7 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications the duration of a collision condition. the transitions o n the crs signal are not synchronous to either the m tx_clk or the m rx_clk. the phy controller tri - states crs in isolate mode. 44 mtx_clk i o mii transmit clock . mtx_clk is a continuous clock that provides a timing reference for the transfer of the mtx_en and mtx_d[3:0] signals from the mac core to the phy controller. the phy controller sources mtx_clk. the operating frequency of mtx_clk is 25 mhz when operating at 100 mbps and 2.5 mhz when operating at 10 mbps. the phy controller tri - states mtx_clk in isol ate mode. 45 mtx_en o i mii transmit enable . a high assertion on mtx_en indicates that the mac core is presenting nibbles to the phy controller for transmission. the ar 6400 mac core asserts mtx_en with the first nibble of the preamble and keeps mtx_en ass erted while all nibbles to be transmitted are presented to the mii. mtx_en is de - asserted prior to the first mtx_clk following the final nibble of the frame. mtx_en transitions synchronously with respect to mtx_clk. the phy controller ignores mtx_en in iso late mode. special care must be taken during pcb layout of the mii bus. keep mii signal traces as short as possible and preferably on inner pcb layers. mii management data interface (mdi) the mii interface has a two - wire bi - directional serial managemen t data interface (mdi). this interface provides access to the status and control registers in the ethernet phy logic. the mii and mdi pins are shared between the mac and phy interfaces. pin number pin name i/o description mac mode phy mode 25 mdio i/ o i/o mii management data in/out . this is the data input signal from the phy controller. the phy drives the read data synchronously with respect to the mdc clock during the read cycles. this is also the data output signal from the mac core that drives the control information during the read/write cycles to the phy controller. the mac core drives the mdo signal synchronously with respect to the mdc. an external pull - up resistor is needed on this pin. 26 mdc o i mii management data clock. the mac core source s mdc as the timing reference for transfer of information on the mdio signal. mdc signal has no maximum high or low times. mdc minimum high and low times are 160 ns each, and the minimum period for mdc is 400 ns. general purpose input / output (gpio) pin s interface general purpose i/o pins are s oftware programmable inputs or outputs, which can also be used as an external interrupt source. as indicated in the tab le below, some of these gpio signals also have additional functionality as configuration strap s. see section 3 for configuration options.
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 8 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications pin number pin name configuration strap function i/o internal pull up/down 12 gpio0 n/a s.c up 13 gpio1 n/a s.c up 14 gpio2 n/a s.c up 15 gpio3 isodef s.c up 16 gpio4 speed s.c up 17 gpio5 md_a3 s.c up 18 gpio6 cfg_sel s.c down 19 gpio7 md_a4 s.c down 20 gpio8 mp_sel s.c up 21 gpio9 n/a s.c down 22 gpio10 bm_sel s.c down 23 gpio11 n/a s.c down * s. c. = software configurable.
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 9 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications in addition to their configuration strap function, the gpios can perform s ome software configurable functions after reset. the default configuration provided by bel fuse is as below: gpio i/o default function after reset gpio0 o not used (hiz) gpio1 i typically connected to a push - button. this gpio is used to add a new device to, or remove an old device from, a homeplug ac logical network. contact bel fuse for further information. gpio2 i typically connected to a push - button. the factory default pib can be restored by applying a low - level digital voltage on gpio2 for greater than 0.5 seconds and less than 3.0 seconds. gpio[3..7] o not used (hiz) gpio8 o to be connected to an led. the led gives indications a bout power line link & activity: on: powerline link detected. flash: tx or rx powerline activity ( 0 ) . off: powerline link not detected. gpio9 o to be connected to an led. the led gives indications about ethernet link & activity : on: ethernet link detected. flash: transmit or receive activity. off: no link detected. gpio10 o to be connected to an led. the led gives indications about power line mode : on: homeplug 1.0 traffic detected flash: n/a off: silence gpio11 o to be connected to an led. the l ed gives indication about power : on: power ready flash: load firmware ( 2 ) off: power not ready 1. the power line link led indicator turns on when powerline link is detected. if the ar6400 module is serving as a station (sta), the led indicator will flash to indicate tran smit or receive powerline activity. if the int6400 module is serving as a cco (central coordinator), the led indicator will light steadily on, even in the presence of powerline activity. 2. if module flash memory is corrupted/blank or a host processor does no t provide fw, the module rom b ased code will blink the power led on and off at a frequency of one cycle per second. phy utility interface pin number pin name i/o description 47 phy_rst/ o phy device reset (active low) . connect to an external ethern et phy. this reset output is a stretched version of the reset/ input. 49 phy_clk o 25mhz clock out. this output is a dedicated clock output that can be used to drive the clock input on an external ethernet phy. this clock output is only available when the ar 6400 is configured in mac mode, and not in phy mode of operation. note that if this output is used, it is strongly advised that the corresponding phy_rst/ signal also be connected to the external ethernet phy.
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 10 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications coupling interface pin number pin name i /o description 6 tx+ o differential tx line driver output, connects to coupling transformer 7 tx - o differential tx line driver output, connects to coupling transformer 9 rx+ i differential rx line filter input, connects to coupling transformer 10 rx - i differential rx line filter input, connects to coupling transformer special care must be taken during printed pcb layout of the coupling interface signals. route differential pairs close together and away from all other signals. route each differ ential pair on the same pcb layer. keep both traces of each differential pair as identical to each other as possible. wide copper is needed here to support current density of up to 30mhz. these high frequencies result in higher resistance due to skin effe ct. the wide traces also accommodate high transient currents caused by voltage spikes. t race widths between the module and the coupling transformer must be no less than 0.020 (0.5 mm) and should be no greater than 0.030 (0.75 mm). reset interface pin n umber pin name i/o description 11 reset/ i resets all ic logic when low. power interface pin number pin name i/o description 1, 3, 5 vdd i +3.3v with respect to vss 2, 4, 8, 29, 36, 46, 48, 50 vss i ground reserved pins internally connec ted and reserved for future use. pin number type description 24 reserved r equired 10k pull - up resistor 27 reserved do not connect externally 28 reserved required connection to ground configuration options the ar 6400 mii and boot options are selected by the initial condition of gpio pins. if a gpio pin is not used and its i nternal strapping resistor sets the booting option correctly, then the pin may be left
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 11 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications unconnected. if a gpio pin is not used but the internal strapping resistor sets the booting option incorrectly, then the pin must be pulled high or low to the correct bo oting option by an external resistor. this resistor can be 10 k - ohms down to a few hundred ohms. 3.3 k - ohms is typical. many gpio pins are driven by firmware for led output immediately after boot up so connecting these gpio directly to ground or vdd is una cceptable. pin number pin name strap function internal pull up/down default function 15 gpio3 isodef up phy mode: hi - z mii interface 16 gpio4 speed up phy mode: 100mbps 17 gpio5 md_a3 up phy mode: phy address 0x0100 18 gpio6 cfg_sel down boot: sdram p arameters from host 19 gpio7 md_a4 down phy mode: phy address 0x0100 20 gpio8 mp_sel up host: mac mode 22 gpio10 bm_sel down boot: firmware from host 49 phy_clk duplex up phy mode: full duplex
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 12 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications mii options the mp_sel strap is used to specify whether t he ar 6400 chip is configured for mii mac mode, or in mii phy mode (i.e. reverse - mii mode). the e ncoding of this signal is shown in the following table : mp_sel mode 0 mii in phy mode 1 mii in mac mode in mii phy mode, there are 5 additional configurati on straps that are unique to this mode of operation. speed mii speed duplex mii duplex 0 10 mbps 0 half duplex 1 100 mbps 1 full duplex isodef isolation md_a [3,4] mii management address 0 normal operation 00 0x00 1 isolated 01 0x08 10 0x10 11 0x18 boot options the bm_sel strap is used to determine the source of the boot code for the embedded arm processor. similarly, the cfg_ sel strap is used to determine the source of the sdram configuration applet. the encodin gs for these two signals are shown in the following table. bm_sel cfg_sel meaning 0 0 load sdram configuration and boot code from external host 0 1 load sdram configuration applet from flash, and then load boot code from external host 1 0 load sdram c onfiguration 1 1 load sdram configuration and boot code from flash design notes ? leave below lines unconnected if they are not unused: ? pin 47: phy_rst# ? pin 49: phy_clk ? pin 27: reserved ? connect pin 28 (reserved) signal to the ground. ? zero - cross detectio n circuit is not required for dc line connection, but to work correctly the plc module requires a pull - up resistor (10k) on zc_in line ? do not force other logic levels than default during the module boot on reserved gpio strappings, gpio: 0 - 2 and 3. ? when t he power line module is in phy mode, rx_er signal should not be connected to the mii bus. this line is not tri - stated. use a 10k ohm pull down resistor only .
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 bel fuse in c. 206 van vorst street, jersey city, nj 07302 ? tel 201 - 432 - 0463 ? fax 201 - 432 - 9542 ? www.belfuse.com 13 0804 - 5000 - 23 industrial powerline module for ethernet over coax applications firmware the 0804 - 5000 - 23 powerline modules are supplied programmed with the most recent firmware versions and default parameter information block (pib) for eoc from qualcomm atheros. the pib contains the parameters used to configure the operation of the ar 6400 chipset, including: ? network management key (nmk), ? mac address ? device access key (dak), ? gp io function after reset. this factory default pib can be superseded by a customized user pib using the avitar pc - based applicati on. a non disclosure agreement is required with qualcomm atheros to access this tool . electrical characteristics symbol param eter test conditions min max units vdd supply voltage ( 1 ) 3.0 3.6 v v il low - level input voltage 0.8 v v ih high - level input voltage 2.0 v v ol low - level output voltage i ol = 4 ma, 12 ma ( 2 ) 0.4 v v oh high - level output voltage i oh = - 4 ma, - 12 ma ( 3 ) 2.4 v i il low - level input current v i = gnd - 1 a i ih high - level input current v i = 3.3 v 1 a i oz high - i mpedance output current gnd < v i < 3.3 v - 1 +1 a t op operating temperature range - 40 +85 c 1. a typical supply current, assuming a nominal operation of 50% transmit and 50% receive duty cycle, is 580 ma. 2. i ol =12 ma for all gpios. i ol = 4 ma for all oth er digital interfaces. 3. i oh = - 12 ma for all gpios. i oh = - 4 ma for all other digital interfaces
?201 3 bel fuse inc. specifications subject to change without notice. 03.09.2013 corporate bel fuse inc. 206 van vors t street jersey city, nj 07302 tel 201 - 432 - 0463 fax 201 - 432 - 9542 www.belfuse.com asia bel fuse ltd. 8f / 8 luk hop street san po kong kowloon, hong kong tel 852 - 2328 - 5515 fax 852 - 2352 - 3706 www.belfuse.com europe bel integrated modules 28 turkey court, turkey mill ashford road maidstone, kent me14 5pp u.k. tel 44 - 1622 - 757395 fax 44 - 1622 - 663252 www.belfuse.com 14 0804 - 5000 - 23 industrial powerline module f or ethernet over coax applications mechanical 0804 - 5000 - 23 horizontal mount

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